bootloader_util.c 11 KB

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  1. /* Copyright (c) 2013 Nordic Semiconductor. All Rights Reserved.
  2. *
  3. * The information contained herein is property of Nordic Semiconductor ASA.
  4. * Terms and conditions of usage are described in detail in NORDIC
  5. * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  6. *
  7. * Licensees are granted free, non-transferable use of the information. NO
  8. * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
  9. * the file.
  10. *
  11. */
  12. #include "bootloader_util.h"
  13. #include <stdint.h>
  14. #include <string.h>
  15. /**
  16. * @brief Function for aborting current application/bootloader jump to to other app/bootloader.
  17. *
  18. * @details This functions will use the address provide to swap the stack pointer and then load
  19. * the address of the reset handler to be executed. It will check current system mode
  20. * (thread/handler) and if in thread mode it will reset into other application.
  21. * If in handler mode \ref isr_abort will be executed to ensure correct exit of handler
  22. * mode and jump into reset handler of other application.
  23. *
  24. * @param[in] start_addr Start address of other application. This address must point to the
  25. initial stack pointer of the application.
  26. *
  27. * @note This function will never return but issue a reset into provided application.
  28. */
  29. #if defined ( __CC_ARM )
  30. __asm static void bootloader_util_reset(uint32_t start_addr)
  31. {
  32. LDR R5, [R0] ; Get App initial MSP for bootloader.
  33. MSR MSP, R5 ; Set the main stack pointer to the applications MSP.
  34. LDR R0, [R0, #0x04] ; Load Reset handler into R0. This will be first argument to branch instruction (BX).
  35. MOVS R4, #0xFF ; Load ones to R4.
  36. SXTB R4, R4 ; Sign extend R4 to obtain 0xFFFFFFFF instead of 0xFF.
  37. MRS R5, IPSR ; Load IPSR to R5 to check for handler or thread mode.
  38. CMP R5, #0x00 ; Compare, if 0 then we are in thread mode and can continue to reset handler of bootloader.
  39. BNE isr_abort ; If not zero we need to exit current ISR and jump to reset handler of bootloader.
  40. MOV LR, R4 ; Clear the link register and set to ones to ensure no return, R4 = 0xFFFFFFFF.
  41. BX R0 ; Branch to reset handler of bootloader.
  42. isr_abort
  43. ; R4 contains ones from line above. Will be popped as R12 when exiting ISR (Cleaning up the registers).
  44. MOV R5, R4 ; Fill with ones before jumping to reset handling. We be popped as LR when exiting ISR. Ensures no return to application.
  45. MOV R6, R0 ; Move address of reset handler to R6. Will be popped as PC when exiting ISR. Ensures the reset handler will be executed when exist ISR.
  46. MOVS r7, #0x21 ; Move MSB reset value of xPSR to R7. Will be popped as xPSR when exiting ISR. xPSR is 0x21000000 thus MSB is 0x21.
  47. REV r7, r7 ; Reverse byte order to put 0x21 as MSB.
  48. PUSH {r4-r7} ; Push everything to new stack to allow interrupt handler to fetch it on exiting the ISR.
  49. MOVS R4, #0x00 ; Fill with zeros before jumping to reset handling. We be popped as R0 when exiting ISR (Cleaning up of the registers).
  50. MOVS R5, #0x00 ; Fill with zeros before jumping to reset handling. We be popped as R1 when exiting ISR (Cleaning up of the registers).
  51. MOVS R6, #0x00 ; Fill with zeros before jumping to reset handling. We be popped as R2 when exiting ISR (Cleaning up of the registers).
  52. MOVS R7, #0x00 ; Fill with zeros before jumping to reset handling. We be popped as R3 when exiting ISR (Cleaning up of the registers).
  53. PUSH {r4-r7} ; Push zeros (R4-R7) to stack to prepare for exiting the interrupt routine.
  54. MOVS R0, #0xF9 ; Move the execution return command into register, 0xFFFFFFF9.
  55. SXTB R0, R0 ; Sign extend R0 to obtain 0xFFFFFFF9 instead of 0xF9.
  56. BX R0 ; No return - Handler mode will be exited. Stack will be popped and execution will continue in reset handler initializing other application.
  57. ALIGN
  58. }
  59. #elif defined ( __GNUC__ )
  60. static inline void bootloader_util_reset(uint32_t start_addr)
  61. {
  62. __asm volatile(
  63. "ldr r0, [%0]\t\n" // Get App initial MSP for bootloader.
  64. "msr msp, r0\t\n" // Set the main stack pointer to the applications MSP.
  65. "ldr r0, [%0, #0x04]\t\n" // Load Reset handler into R0.
  66. "movs r4, #0xFF\t\n" // Move ones to R4.
  67. "sxtb r4, r4\t\n" // Sign extend R4 to obtain 0xFFFFFFFF instead of 0xFF.
  68. "mrs r5, IPSR\t\n" // Load IPSR to R5 to check for handler or thread mode.
  69. "cmp r5, #0x00\t\n" // Compare, if 0 then we are in thread mode and can continue to reset handler of bootloader.
  70. "bne isr_abort\t\n" // If not zero we need to exit current ISR and jump to reset handler of bootloader.
  71. "mov lr, r4\t\n" // Clear the link register and set to ones to ensure no return.
  72. "bx r0\t\n" // Branch to reset handler of bootloader.
  73. "isr_abort: \t\n"
  74. "mov r5, r4\t\n" // Fill with ones before jumping to reset handling. Will be popped as LR when exiting ISR. Ensures no return to application.
  75. "mov r6, r0\t\n" // Move address of reset handler to R6. Will be popped as PC when exiting ISR. Ensures the reset handler will be executed when exist ISR.
  76. "movs r7, #0x21\t\n" // Move MSB reset value of xPSR to R7. Will be popped as xPSR when exiting ISR. xPSR is 0x21000000 thus MSB is 0x21.
  77. "rev r7, r7\t\n" // Reverse byte order to put 0x21 as MSB.
  78. "push {r4-r7}\t\n" // Push everything to new stack to allow interrupt handler to fetch it on exiting the ISR.
  79. "movs r4, #0x00\t\n" // Fill with zeros before jumping to reset handling. We be popped as R0 when exiting ISR (Cleaning up of the registers).
  80. "movs r5, #0x00\t\n" // Fill with zeros before jumping to reset handling. We be popped as R1 when exiting ISR (Cleaning up of the registers).
  81. "movs r6, #0x00\t\n" // Fill with zeros before jumping to reset handling. We be popped as R2 when exiting ISR (Cleaning up of the registers).
  82. "movs r7, #0x00\t\n" // Fill with zeros before jumping to reset handling. We be popped as R3 when exiting ISR (Cleaning up of the registers).
  83. "push {r4-r7}\t\n" // Push zeros (R4-R7) to stack to prepare for exiting the interrupt routine.
  84. "movs r0, #0xF9\t\n" // Move the execution return command into register, 0xFFFFFFF9.
  85. "sxtb r0, r0\t\n" // Sign extend R0 to obtain 0xFFFFFFF9 instead of 0xF9.
  86. "bx r0\t\n" // No return - Handler mode will be exited. Stack will be popped and execution will continue in reset handler initializing other application.
  87. ".align\t\n"
  88. :: "r" (start_addr) // Argument list for the gcc assembly. start_addr is %0.
  89. : "r0", "r4", "r5", "r6", "r7" // List of register maintained manually.
  90. );
  91. }
  92. #elif defined ( __ICCARM__ )
  93. static inline void bootloader_util_reset(uint32_t start_addr)
  94. {
  95. asm("ldr r5, [%0]\n" // Get App initial MSP for bootloader.
  96. "msr msp, r5\n" // Set the main stack pointer to the applications MSP.
  97. "ldr r0, [%0, #0x04]\n" // Load Reset handler into R0.
  98. "movs r4, #0x00\n" // Load zero into R4.
  99. "mvns r4, r4\n" // Invert R4 to ensure it contain ones.
  100. "mrs r5, IPSR\n" // Load IPSR to R5 to check for handler or thread mode
  101. "cmp r5, #0x00\n" // Compare, if 0 then we are in thread mode and can continue to reset handler of bootloader.
  102. "bne.n isr_abort\n" // If not zero we need to exit current ISR and jump to reset handler of bootloader.
  103. "mov lr, r4\n" // Clear the link register and set to ones to ensure no return.
  104. "bx r0\n" // Branch to reset handler of bootloader.
  105. "isr_abort: \n"
  106. // R4 contains ones from line above. We be popped as R12 when exiting ISR (Cleaning up the registers).
  107. "mov r5, r4\n" // Fill with ones before jumping to reset handling. Will be popped as LR when exiting ISR. Ensures no return to application.
  108. "mov r6, r0\n" // Move address of reset handler to R6. Will be popped as PC when exiting ISR. Ensures the reset handler will be executed when exist ISR.
  109. "movs r7, #0x21\n" // Move MSB reset value of xPSR to R7. Will be popped as xPSR when exiting ISR. xPSR is 0x21000000 thus MSB is 0x21.
  110. "rev r7, r7\n" // Reverse byte order to put 0x21 as MSB.
  111. "push {r4-r7}\n" // Push everything to new stack to allow interrupt handler to fetch it on exiting the ISR.
  112. "movs r4, #0x00\n" // Fill with zeros before jumping to reset handling. We be popped as R0 when exiting ISR (Cleaning up of the registers).
  113. "movs r5, #0x00\n" // Fill with zeros before jumping to reset handling. We be popped as R1 when exiting ISR (Cleaning up of the registers).
  114. "movs r6, #0x00\n" // Fill with zeros before jumping to reset handling. We be popped as R2 when exiting ISR (Cleaning up of the registers).
  115. "movs r7, #0x00\n" // Fill with zeros before jumping to reset handling. We be popped as R3 when exiting ISR (Cleaning up of the registers).
  116. "push {r4-r7}\n" // Push zeros (R4-R7) to stack to prepare for exiting the interrupt routine.
  117. "movs r0, #0x06\n" // Load 0x06 into R6 to prepare for exec return command.
  118. "mvns r0, r0\n" // Invert 0x06 to obtain EXEC_RETURN, 0xFFFFFFF9.
  119. "bx r0\n" // No return - Handler mode will be exited. Stack will be popped and execution will continue in reset handler initializing other application.
  120. :: "r" (start_addr) // Argument list for the IAR assembly. start_addr is %0.
  121. : "r0", "r4", "r5", "r6", "r7"); // List of register maintained manually.
  122. }
  123. #else
  124. #error Compiler not supported.
  125. #endif
  126. void bootloader_util_app_start(uint32_t start_addr)
  127. {
  128. bootloader_util_reset(start_addr);
  129. }