nrf_uarte.h 17 KB

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  1. /* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
  2. *
  3. * The information contained herein is property of Nordic Semiconductor ASA.
  4. * Terms and conditions of usage are described in detail in NORDIC
  5. * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  6. *
  7. * Licensees are granted free, non-transferable use of the information. NO
  8. * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
  9. * the file.
  10. *
  11. */
  12. #ifndef NRF_UARTE_H__
  13. #define NRF_UARTE_H__
  14. #include "nrf.h"
  15. #include <stdint.h>
  16. #include <stddef.h>
  17. #include <stdbool.h>
  18. #define NRF_UARTE_PSEL_DISCONNECTED 0xFFFFFFFF
  19. /**
  20. * @defgroup nrf_uarte_hal UARTE HAL
  21. * @{
  22. * @ingroup nrf_uart
  23. *
  24. * @brief Hardware access layer for accessing the UARTE peripheral.
  25. */
  26. /**
  27. * @enum nrf_uarte_task_t
  28. * @brief UARTE tasks.
  29. */
  30. typedef enum
  31. {
  32. /*lint -save -e30*/
  33. NRF_UARTE_TASK_STARTRX = offsetof(NRF_UARTE_Type, TASKS_STARTRX),///< Start UART receiver.
  34. NRF_UARTE_TASK_STOPRX = offsetof(NRF_UARTE_Type, TASKS_STOPRX), ///< Stop UART receiver.
  35. NRF_UARTE_TASK_STARTTX = offsetof(NRF_UARTE_Type, TASKS_STARTTX),///< Start UART transmitter.
  36. NRF_UARTE_TASK_STOPTX = offsetof(NRF_UARTE_Type, TASKS_STOPTX), ///< Stop UART transmitter.
  37. NRF_UARTE_TASK_FLUSHRX = offsetof(NRF_UARTE_Type, TASKS_FLUSHRX) ///< Flush RX FIFO in RX buffer.
  38. /*lint -restore*/
  39. } nrf_uarte_task_t;
  40. /**
  41. * @enum nrf_uarte_event_t
  42. * @brief UARTE events.
  43. */
  44. typedef enum
  45. {
  46. /*lint -save -e30*/
  47. NRF_UARTE_EVENT_CTS = offsetof(NRF_UARTE_Type, EVENTS_CTS), ///< CTS is activated.
  48. NRF_UARTE_EVENT_NCTS = offsetof(NRF_UARTE_Type, EVENTS_NCTS), ///< CTS is deactivated.
  49. NRF_UARTE_EVENT_ENDRX = offsetof(NRF_UARTE_Type, EVENTS_ENDRX), ///< Receive buffer is filled up.
  50. NRF_UARTE_EVENT_ENDTX = offsetof(NRF_UARTE_Type, EVENTS_ENDTX), ///< Last TX byte transmitted.
  51. NRF_UARTE_EVENT_ERROR = offsetof(NRF_UARTE_Type, EVENTS_ERROR), ///< Error detected.
  52. NRF_UARTE_EVENT_RXTO = offsetof(NRF_UARTE_Type, EVENTS_RXTO), ///< Receiver timeout.
  53. NRF_UARTE_EVENT_RXSTARTED = offsetof(NRF_UARTE_Type, EVENTS_RXSTARTED),///< Receiver has started.
  54. NRF_UARTE_EVENT_TXSTARTED = offsetof(NRF_UARTE_Type, EVENTS_TXSTARTED),///< Transmitter has started.
  55. NRF_UARTE_EVENT_TXSTOPPED = offsetof(NRF_UARTE_Type, EVENTS_TXSTOPPED) ///< Transmitted stopped.
  56. /*lint -restore*/
  57. } nrf_uarte_event_t;
  58. /**
  59. * @brief Types of UARTE shortcuts.
  60. */
  61. typedef enum
  62. {
  63. NRF_UARTE_SHORT_ENDRX_STARTRX = UARTE_SHORTS_ENDRX_STARTRX_Msk,///< Shortcut between ENDRX event and STARTRX task.
  64. NRF_UARTE_SHORT_ENDRX_STOPRX = UARTE_SHORTS_ENDRX_STOPRX_Msk, ///< Shortcut between ENDRX event and STOPRX task.
  65. } nrf_uarte_short_t;
  66. /**
  67. * @enum nrf_uarte_int_mask_t
  68. * @brief UARTE interrupts.
  69. */
  70. typedef enum
  71. {
  72. NRF_UARTE_INT_CTS_MASK = UARTE_INTENSET_CTS_Msk, ///< Interrupt on CTS event.
  73. NRF_UARTE_INT_NCTSRX_MASK = UARTE_INTENSET_NCTS_Msk, ///< Interrupt on NCTS event.
  74. NRF_UARTE_INT_ENDRX_MASK = UARTE_INTENSET_ENDRX_Msk, ///< Interrupt on ENDRX event.
  75. NRF_UARTE_INT_ENDTX_MASK = UARTE_INTENSET_ENDTX_Msk, ///< Interrupt on ENDTX event.
  76. NRF_UARTE_INT_ERROR_MASK = UARTE_INTENSET_ERROR_Msk, ///< Interrupt on ERROR event.
  77. NRF_UARTE_INT_RXTO_MASK = UARTE_INTENSET_RXTO_Msk, ///< Interrupt on RXTO event.
  78. NRF_UARTE_INT_RXSTARTED_MASK = UARTE_INTENSET_RXSTARTED_Msk,///< Interrupt on RXSTARTED event.
  79. NRF_UARTE_INT_TXSTARTED_MASK = UARTE_INTENSET_TXSTARTED_Msk,///< Interrupt on TXSTARTED event.
  80. NRF_UARTE_INT_TXSTOPPED_MASK = UARTE_INTENSET_TXSTOPPED_Msk ///< Interrupt on TXSTOPPED event.
  81. } nrf_uarte_int_mask_t;
  82. /**
  83. * @enum nrf_uarte_baudrate_t
  84. * @brief Baudrates supported by UARTE.
  85. */
  86. typedef enum
  87. {
  88. NRF_UARTE_BAUDRATE_1200 = UARTE_BAUDRATE_BAUDRATE_Baud1200, ///< 1200 baud.
  89. NRF_UARTE_BAUDRATE_2400 = UARTE_BAUDRATE_BAUDRATE_Baud2400, ///< 2400 baud.
  90. NRF_UARTE_BAUDRATE_4800 = UARTE_BAUDRATE_BAUDRATE_Baud4800, ///< 4800 baud.
  91. NRF_UARTE_BAUDRATE_9600 = UARTE_BAUDRATE_BAUDRATE_Baud9600, ///< 9600 baud.
  92. NRF_UARTE_BAUDRATE_14400 = UARTE_BAUDRATE_BAUDRATE_Baud14400, ///< 14400 baud.
  93. NRF_UARTE_BAUDRATE_19200 = UARTE_BAUDRATE_BAUDRATE_Baud19200, ///< 19200 baud.
  94. NRF_UARTE_BAUDRATE_28800 = UARTE_BAUDRATE_BAUDRATE_Baud28800, ///< 28800 baud.
  95. NRF_UARTE_BAUDRATE_38400 = UARTE_BAUDRATE_BAUDRATE_Baud38400, ///< 38400 baud.
  96. NRF_UARTE_BAUDRATE_57600 = UARTE_BAUDRATE_BAUDRATE_Baud57600, ///< 57600 baud.
  97. NRF_UARTE_BAUDRATE_76800 = UARTE_BAUDRATE_BAUDRATE_Baud76800, ///< 76800 baud.
  98. NRF_UARTE_BAUDRATE_115200 = UARTE_BAUDRATE_BAUDRATE_Baud115200, ///< 115200 baud.
  99. NRF_UARTE_BAUDRATE_230400 = UARTE_BAUDRATE_BAUDRATE_Baud230400, ///< 230400 baud.
  100. NRF_UARTE_BAUDRATE_250000 = UARTE_BAUDRATE_BAUDRATE_Baud250000, ///< 250000 baud.
  101. NRF_UARTE_BAUDRATE_460800 = UARTE_BAUDRATE_BAUDRATE_Baud460800, ///< 460800 baud.
  102. NRF_UARTE_BAUDRATE_921600 = UARTE_BAUDRATE_BAUDRATE_Baud921600, ///< 921600 baud.
  103. NRF_UARTE_BAUDRATE_1000000 = UARTE_BAUDRATE_BAUDRATE_Baud1M, ///< 1000000 baud.
  104. } nrf_uarte_baudrate_t;
  105. /**
  106. * @enum nrf_uarte_error_mask_t
  107. * @brief Types of UARTE error masks.
  108. */
  109. typedef enum
  110. {
  111. NRF_UARTE_ERROR_OVERRUN_MASK = UARTE_ERRORSRC_OVERRUN_Msk, ///< Overrun error.
  112. NRF_UARTE_ERROR_PARITY_MASK = UARTE_ERRORSRC_PARITY_Msk, ///< Parity error.
  113. NRF_UARTE_ERROR_FRAMING_MASK = UARTE_ERRORSRC_FRAMING_Msk, ///< Framing error.
  114. NRF_UARTE_ERROR_BREAK_MASK = UARTE_ERRORSRC_BREAK_Msk, ///< Break error.
  115. } nrf_uarte_error_mask_t;
  116. /**
  117. * @enum nrf_uarte_parity_t
  118. * @brief Types of UARTE parity modes.
  119. */
  120. typedef enum
  121. {
  122. NRF_UARTE_PARITY_EXCLUDED = UARTE_CONFIG_PARITY_Excluded << UARTE_CONFIG_PARITY_Pos, ///< Parity excluded.
  123. NRF_UARTE_PARITY_INCLUDED = UARTE_CONFIG_PARITY_Included << UARTE_CONFIG_PARITY_Pos, ///< Parity included.
  124. } nrf_uarte_parity_t;
  125. /**
  126. * @enum nrf_uarte_hwfc_t
  127. * @brief Types of UARTE flow control modes.
  128. */
  129. typedef enum
  130. {
  131. NRF_UARTE_HWFC_DISABLED = UARTE_CONFIG_HWFC_Disabled << UARTE_CONFIG_HWFC_Pos, ///< HW flow control disabled.
  132. NRF_UARTE_HWFC_ENABLED = UARTE_CONFIG_HWFC_Enabled << UARTE_CONFIG_HWFC_Pos, ///< HW flow control enabled.
  133. } nrf_uarte_hwfc_t;
  134. /**
  135. * @brief Function for clearing a specific UARTE event.
  136. *
  137. * @param[in] p_reg UARTE instance.
  138. * @param[in] event Event to clear.
  139. */
  140. __STATIC_INLINE void nrf_uarte_event_clear(NRF_UARTE_Type * p_reg, nrf_uarte_event_t event);
  141. /**
  142. * @brief Function for checking the state of a specific UARTE event.
  143. *
  144. * @param[in] p_reg UARTE instance.
  145. * @param[in] event Event to check.
  146. *
  147. * @retval True if event is set, False otherwise.
  148. */
  149. __STATIC_INLINE bool nrf_uarte_event_check(NRF_UARTE_Type * p_reg, nrf_uarte_event_t event);
  150. /**
  151. * @brief Function for returning the address of a specific UARTE event register.
  152. *
  153. * @param[in] p_reg UARTE instance.
  154. * @param[in] event Desired event.
  155. *
  156. * @retval Address of specified event register.
  157. */
  158. __STATIC_INLINE uint32_t nrf_uarte_event_address_get(NRF_UARTE_Type * p_reg,
  159. nrf_uarte_event_t event);
  160. /**
  161. * @brief Function for enabling UARTE shortcuts.
  162. *
  163. * @param p_reg UARTE instance.
  164. * @param shorts_mask Shortcuts to enable.
  165. */
  166. __STATIC_INLINE void nrf_uarte_shorts_enable(NRF_UARTE_Type * p_reg, uint32_t shorts_mask);
  167. /**
  168. * @brief Function for disabling UARTE shortcuts.
  169. *
  170. * @param p_reg UARTE instance.
  171. * @param shorts_mask Shortcuts to disable.
  172. */
  173. __STATIC_INLINE void nrf_uarte_shorts_disable(NRF_UARTE_Type * p_reg, uint32_t shorts_mask);
  174. /**
  175. * @brief Function for enabling UARTE interrupts.
  176. *
  177. * @param p_reg Instance.
  178. * @param int_mask Interrupts to enable.
  179. */
  180. __STATIC_INLINE void nrf_uarte_int_enable(NRF_UARTE_Type * p_reg, uint32_t int_mask);
  181. /**
  182. * @brief Function for retrieving the state of a given interrupt.
  183. *
  184. * @param p_reg Instance.
  185. * @param int_mask Mask of interrupt to check.
  186. *
  187. * @retval true If the interrupt is enabled.
  188. * @retval false If the interrupt is not enabled.
  189. */
  190. __STATIC_INLINE bool nrf_uarte_int_enable_check(NRF_UARTE_Type * p_reg, nrf_uarte_int_mask_t int_mask);
  191. /**
  192. * @brief Function for disabling specific interrupts.
  193. *
  194. * @param p_reg Instance.
  195. * @param int_mask Interrupts to disable.
  196. */
  197. __STATIC_INLINE void nrf_uarte_int_disable(NRF_UARTE_Type * p_reg, uint32_t int_mask);
  198. /**
  199. * @brief Function for getting error source mask. Function is clearing error source flags after reading.
  200. *
  201. * @param p_reg Instance.
  202. * @return Mask with error source flags.
  203. */
  204. __STATIC_INLINE uint32_t nrf_uarte_errorsrc_get_and_clear(NRF_UARTE_Type * p_reg);
  205. /**
  206. * @brief Function for enabling UARTE.
  207. *
  208. * @param p_reg Instance.
  209. */
  210. __STATIC_INLINE void nrf_uarte_enable(NRF_UARTE_Type * p_reg);
  211. /**
  212. * @brief Function for disabling UARTE.
  213. *
  214. * @param p_reg Instance.
  215. */
  216. __STATIC_INLINE void nrf_uarte_disable(NRF_UARTE_Type * p_reg);
  217. /**
  218. * @brief Function for configuring TX/RX pins.
  219. *
  220. * @param p_reg Instance.
  221. * @param pseltxd TXD pin number.
  222. * @param pselrxd RXD pin number.
  223. */
  224. __STATIC_INLINE void nrf_uarte_txrx_pins_set(NRF_UARTE_Type * p_reg, uint32_t pseltxd, uint32_t pselrxd);
  225. /**
  226. * @brief Function for disconnecting TX/RX pins.
  227. *
  228. * @param p_reg Instance.
  229. */
  230. __STATIC_INLINE void nrf_uarte_txrx_pins_disconnect(NRF_UARTE_Type * p_reg);
  231. /**
  232. * @brief Function for getting TX pin.
  233. *
  234. * @param p_reg Instance.
  235. */
  236. __STATIC_INLINE uint32_t nrf_uarte_tx_pin_get(NRF_UARTE_Type * p_reg);
  237. /**
  238. * @brief Function for getting RX pin.
  239. *
  240. * @param p_reg Instance.
  241. */
  242. __STATIC_INLINE uint32_t nrf_uarte_rx_pin_get(NRF_UARTE_Type * p_reg);
  243. /**
  244. * @brief Function for getting RTS pin.
  245. *
  246. * @param p_reg Instance.
  247. */
  248. __STATIC_INLINE uint32_t nrf_uarte_rts_pin_get(NRF_UARTE_Type * p_reg);
  249. /**
  250. * @brief Function for getting CTS pin.
  251. *
  252. * @param p_reg Instance.
  253. */
  254. __STATIC_INLINE uint32_t nrf_uarte_cts_pin_get(NRF_UARTE_Type * p_reg);
  255. /**
  256. * @brief Function for configuring flow control pins.
  257. *
  258. * @param p_reg Instance.
  259. * @param pselrts RTS pin number.
  260. * @param pselcts CTS pin number.
  261. */
  262. __STATIC_INLINE void nrf_uarte_hwfc_pins_set(NRF_UARTE_Type * p_reg,
  263. uint32_t pselrts,
  264. uint32_t pselcts);
  265. /**
  266. * @brief Function for disconnecting flow control pins.
  267. *
  268. * @param p_reg Instance.
  269. */
  270. __STATIC_INLINE void nrf_uarte_hwfc_pins_disconnect(NRF_UARTE_Type * p_reg);
  271. /**
  272. * @brief Function for starting an UARTE task.
  273. *
  274. * @param p_reg Instance.
  275. * @param task Task.
  276. */
  277. __STATIC_INLINE void nrf_uarte_task_trigger(NRF_UARTE_Type * p_reg, nrf_uarte_task_t task);
  278. /**
  279. * @brief Function for returning the address of a specific task register.
  280. *
  281. * @param p_reg Instance.
  282. * @param task Task.
  283. *
  284. * @return Task address.
  285. */
  286. __STATIC_INLINE uint32_t nrf_uarte_task_address_get(NRF_UARTE_Type * p_reg, nrf_uarte_task_t task);
  287. /**
  288. * @brief Function for configuring UARTE.
  289. *
  290. * @param p_reg Instance.
  291. * @param hwfc Hardware flow control. Enabled if true.
  292. * @param parity Parity. Included if true.
  293. */
  294. __STATIC_INLINE void nrf_uarte_configure(NRF_UARTE_Type * p_reg,
  295. nrf_uarte_parity_t parity,
  296. nrf_uarte_hwfc_t hwfc);
  297. /**
  298. * @brief Function for setting UARTE baudrate.
  299. *
  300. * @param p_reg Instance.
  301. * @param baudrate Baudrate.
  302. */
  303. __STATIC_INLINE void nrf_uarte_baudrate_set(NRF_UARTE_Type * p_reg, nrf_uarte_baudrate_t baudrate);
  304. /**
  305. * @brief Function for setting the transmit buffer.
  306. *
  307. * @param[in] p_reg Instance.
  308. * @param[in] p_buffer Pointer to the buffer with data to send.
  309. * @param[in] length Maximum number of data bytes to transmit.
  310. */
  311. __STATIC_INLINE void nrf_uarte_tx_buffer_set(NRF_UARTE_Type * p_reg,
  312. uint8_t const * p_buffer,
  313. uint8_t length);
  314. /**
  315. * @brief Function for getting number of bytes transmitted in the last transaction.
  316. *
  317. * @param[in] p_reg Instance.
  318. *
  319. * @retval Amount of bytes transmitted.
  320. */
  321. __STATIC_INLINE uint32_t nrf_uarte_tx_amount_get(NRF_UARTE_Type * p_reg);
  322. /**
  323. * @brief Function for setting the receive buffer.
  324. *
  325. * @param[in] p_reg Instance.
  326. * @param[in] p_buffer Pointer to the buffer for received data.
  327. * @param[in] length Maximum number of data bytes to receive.
  328. */
  329. __STATIC_INLINE void nrf_uarte_rx_buffer_set(NRF_UARTE_Type * p_reg,
  330. uint8_t * p_buffer,
  331. uint8_t length);
  332. /**
  333. * @brief Function for getting number of bytes received in the last transaction.
  334. *
  335. * @param[in] p_reg Instance.
  336. *
  337. * @retval Amount of bytes received.
  338. */
  339. __STATIC_INLINE uint32_t nrf_uarte_rx_amount_get(NRF_UARTE_Type * p_reg);
  340. #ifndef SUPPRESS_INLINE_IMPLEMENTATION
  341. __STATIC_INLINE void nrf_uarte_event_clear(NRF_UARTE_Type * p_reg, nrf_uarte_event_t event)
  342. {
  343. *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
  344. }
  345. __STATIC_INLINE bool nrf_uarte_event_check(NRF_UARTE_Type * p_reg, nrf_uarte_event_t event)
  346. {
  347. return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
  348. }
  349. __STATIC_INLINE uint32_t nrf_uarte_event_address_get(NRF_UARTE_Type * p_reg,
  350. nrf_uarte_event_t event)
  351. {
  352. return (uint32_t)((uint8_t *)p_reg + (uint32_t)event);
  353. }
  354. __STATIC_INLINE void nrf_uarte_shorts_enable(NRF_UARTE_Type * p_reg, uint32_t shorts_mask)
  355. {
  356. p_reg->SHORTS |= shorts_mask;
  357. }
  358. __STATIC_INLINE void nrf_uarte_shorts_disable(NRF_UARTE_Type * p_reg, uint32_t shorts_mask)
  359. {
  360. p_reg->SHORTS &= ~(shorts_mask);
  361. }
  362. __STATIC_INLINE void nrf_uarte_int_enable(NRF_UARTE_Type * p_reg, uint32_t int_mask)
  363. {
  364. p_reg->INTENSET = int_mask;
  365. }
  366. __STATIC_INLINE bool nrf_uarte_int_enable_check(NRF_UARTE_Type * p_reg, nrf_uarte_int_mask_t int_mask)
  367. {
  368. return (bool)(p_reg->INTENSET & int_mask);
  369. }
  370. __STATIC_INLINE void nrf_uarte_int_disable(NRF_UARTE_Type * p_reg, uint32_t int_mask)
  371. {
  372. p_reg->INTENCLR = int_mask;
  373. }
  374. __STATIC_INLINE uint32_t nrf_uarte_errorsrc_get_and_clear(NRF_UARTE_Type * p_reg)
  375. {
  376. uint32_t errsrc_mask = p_reg->ERRORSRC;
  377. p_reg->ERRORSRC = errsrc_mask;
  378. return errsrc_mask;
  379. }
  380. __STATIC_INLINE void nrf_uarte_enable(NRF_UARTE_Type * p_reg)
  381. {
  382. p_reg->ENABLE = UARTE_ENABLE_ENABLE_Enabled;
  383. }
  384. __STATIC_INLINE void nrf_uarte_disable(NRF_UARTE_Type * p_reg)
  385. {
  386. p_reg->ENABLE = UARTE_ENABLE_ENABLE_Disabled;
  387. }
  388. __STATIC_INLINE void nrf_uarte_txrx_pins_set(NRF_UARTE_Type * p_reg, uint32_t pseltxd, uint32_t pselrxd)
  389. {
  390. p_reg->PSEL.TXD = pseltxd;
  391. p_reg->PSEL.RXD = pselrxd;
  392. }
  393. __STATIC_INLINE void nrf_uarte_txrx_pins_disconnect(NRF_UARTE_Type * p_reg)
  394. {
  395. nrf_uarte_txrx_pins_set(p_reg, NRF_UARTE_PSEL_DISCONNECTED, NRF_UARTE_PSEL_DISCONNECTED);
  396. }
  397. __STATIC_INLINE uint32_t nrf_uarte_tx_pin_get(NRF_UARTE_Type * p_reg)
  398. {
  399. return p_reg->PSEL.TXD;
  400. }
  401. __STATIC_INLINE uint32_t nrf_uarte_rx_pin_get(NRF_UARTE_Type * p_reg)
  402. {
  403. return p_reg->PSEL.RXD;
  404. }
  405. __STATIC_INLINE uint32_t nrf_uarte_rts_pin_get(NRF_UARTE_Type * p_reg)
  406. {
  407. return p_reg->PSEL.RTS;
  408. }
  409. __STATIC_INLINE uint32_t nrf_uarte_cts_pin_get(NRF_UARTE_Type * p_reg)
  410. {
  411. return p_reg->PSEL.CTS;
  412. }
  413. __STATIC_INLINE void nrf_uarte_hwfc_pins_set(NRF_UARTE_Type * p_reg, uint32_t pselrts, uint32_t pselcts)
  414. {
  415. p_reg->PSEL.RTS = pselrts;
  416. p_reg->PSEL.CTS = pselcts;
  417. }
  418. __STATIC_INLINE void nrf_uarte_hwfc_pins_disconnect(NRF_UARTE_Type * p_reg)
  419. {
  420. nrf_uarte_hwfc_pins_set(p_reg, NRF_UARTE_PSEL_DISCONNECTED, NRF_UARTE_PSEL_DISCONNECTED);
  421. }
  422. __STATIC_INLINE void nrf_uarte_task_trigger(NRF_UARTE_Type * p_reg, nrf_uarte_task_t task)
  423. {
  424. *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
  425. }
  426. __STATIC_INLINE uint32_t nrf_uarte_task_address_get(NRF_UARTE_Type * p_reg, nrf_uarte_task_t task)
  427. {
  428. return (uint32_t)p_reg + (uint32_t)task;
  429. }
  430. __STATIC_INLINE void nrf_uarte_configure(NRF_UARTE_Type * p_reg,
  431. nrf_uarte_parity_t parity,
  432. nrf_uarte_hwfc_t hwfc)
  433. {
  434. p_reg->CONFIG = (uint32_t)parity | (uint32_t)hwfc;
  435. }
  436. __STATIC_INLINE void nrf_uarte_baudrate_set(NRF_UARTE_Type * p_reg, nrf_uarte_baudrate_t baudrate)
  437. {
  438. p_reg->BAUDRATE = baudrate;
  439. }
  440. __STATIC_INLINE void nrf_uarte_tx_buffer_set(NRF_UARTE_Type * p_reg,
  441. uint8_t const * p_buffer,
  442. uint8_t length)
  443. {
  444. p_reg->TXD.PTR = (uint32_t)p_buffer;
  445. p_reg->TXD.MAXCNT = length;
  446. }
  447. __STATIC_INLINE uint32_t nrf_uarte_tx_amount_get(NRF_UARTE_Type * p_reg)
  448. {
  449. return p_reg->TXD.AMOUNT;
  450. }
  451. __STATIC_INLINE void nrf_uarte_rx_buffer_set(NRF_UARTE_Type * p_reg,
  452. uint8_t * p_buffer,
  453. uint8_t length)
  454. {
  455. p_reg->RXD.PTR = (uint32_t)p_buffer;
  456. p_reg->RXD.MAXCNT = length;
  457. }
  458. __STATIC_INLINE uint32_t nrf_uarte_rx_amount_get(NRF_UARTE_Type * p_reg)
  459. {
  460. return p_reg->RXD.AMOUNT;
  461. }
  462. #endif //SUPPRESS_INLINE_IMPLEMENTATION
  463. /** @} */
  464. #endif //NRF_UARTE_H__